1 AM4926N analog power may, 2005 - rev. a preliminary publication order number: ds-am4926_b these miniature surface mount mosfets utilize high cell density process. low r ds(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. typical applications are pwmdc-dc converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. v ds (v) r ds(on) m( ? )i d (a) 58 @ v gs = 4.5v 5.0 82 @ v gs = 2.5v 4.2 product summary 20 dual n-channel 20-v (d-s) mosfet ?low r ds(on) provides higher efficiency and extends battery life ? miniature so-8 surface mount package saves board space ? high power and current handling capability ? low side high current dc-dc converter applications notes a. surface mounted on 1? x 1? fr4 board. b. pulse width limited by maximum junction temperature 1 2 3 4 7 8 5 6 symbol limit units v ds 20 v gs 12 t a =25 o c5.0 t a =70 o c4.1 i dm 30 i s 1.7 a t a =25 o c2.1 t a =70 o c1.3 t j , t stg -55 to 150 o c power dissipation a p d operating junction and storage temperature range w continuous source current (diode conduction) a absolute maximum ratings (t a = 25 o c unless otherwise noted) parame te r pulsed drain current b v gate-source voltage drain-source voltage continuous drain current a i d a symbol maximum units t <= 10 sec 62.5 o c/w steady state 80 o c/w thermal resistance ratings parameter r ja maximum junction-to-ambient a
2 AM4926N analog power may, 2005 - rev. a preliminary publication order number: ds-am4926_b notes a. pulse test: pw <= 3 00us duty cycle <= 2%. b. guaranteed by design, not subject to production testing. analog power (apl) reserves the right to make changes without further notic e to any products herein. apl makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does apl assume any liability arising ou t of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, conseque ntial or incidental damages. ?typical? parameters which may be provided in apl data sheet s and/or specifications can a nd do vary in different appli cations and actual performance may vary over time. all operating parameters , including ?typical? must be validated for each customer appli cation by customer?s technical experts. apl does not convey any license under its patent rights nor the rights of others. apl products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications int ended to support or sustain life, or for any other application in which the failure of the apl product could create a situation where personal inju ry or death may occur. should buyer purchase or use apl products for any such uninte nded or unauthorized application, buyer shall indemnify and hold a pl and its officers, employees, subsidiari es, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirect ly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that apl was negligent regarding the design or m anufacture of the part. apl is an equal opportunity/affirmative action employer. min typ max gate-threshold voltage v gs(th) v ds = v gs , i d = 250 ua 0.7 gate-body leakage i gss v ds = 0 v, v gs = 12 v 100 na v ds = 16 v, v gs = 0 v 1 v ds = 16 v, v gs = 0 v, t j = 55 o c 25 on-state drain current a i d ( on ) v ds = 5 v, v gs = 4.5 v 20 a v gs = 4.5 v, i d = 5 a 58 v gs = 2.5 v, i d =4.2 a 82 forward tranconductance a g fs v ds = 15 v, i d = 5 a 22 s diode forward voltage v sd i s = 1.7 a, v gs = 0 v 0.7 v total gate charge q g 7.5 gate-source charge q gs 0.6 gate-drain charge q g d 1.0 turn-on delay time t d(on) 22 rise time t r 40 turn-off delay time t d ( off ) 50 fall-time t f 20 source-ddrain reverse recovery time t rr i f = 1.7 a, di/dt = 100 a/us 40 m ? parameter limits unit v dd = 15 v, r l = 15 ? , i d = 1 a, v gen = 4.5 v v ds = 15 v, v gs = 4.5 v, i d = 5 a nc ns dynamic b specifications (t a = 25 o c unless otherwise noted) ua i dss zero gate voltage drain current static test conditions symbol drain-source on-resistance a r ds(on)
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